IEEE International Symposium on Integrated Circuits and Systems
December 4–6, 2026 · Torino, Italy
Authors

Call for Papers & Submission Instructions

ISICAS 2026 invites full-length papers describing integrated circuits and systems implementations with experimental validation, measurement results, and demonstrated impact.

Submission Deadlines

11 May 2026 TCAS-I, TBioCAS, TCAS-AI, TVLSI
1 June 2026 TCAS-II, OJCAS

Requirements

Prospective authors are invited to submit full-length papers with a complete description of their integrated circuits and systems implementations and collected measurement results.

All accepted papers will be published in Special Issues of TCAS-I, TCAS-II, TVLSI, TBioCAS, TCAS-AI, and OJCAS shortly after presentation at ISICAS 2026.

In addition to the IEEE ISICAS special section requirements for TCAS-I, TCAS-II, OJCAS, TVLSI, TCAS-AI, and TBioCAS, submissions should meet the following criteria:

  • Analog and mixed-signal, nonlinear, communications, power, and biomedical circuits must include on-chip implementation and measured silicon results.
  • Digital circuits and systems and VLSI must include at least FPGA verification.
  • Extended versions of recently published conference papers with significant additional material are also welcomed.

To ensure consistency in evaluation, only submissions meeting these requirements will be considered for review.

Paper Preparation and Submission

All submitted manuscripts must conform to the formatting and page-limit requirements set by TCAS-I, TCAS-II, TVLSI, TBioCAS, TCAS-AI, and OJCAS.

Authors of accepted manuscripts will be invited to present their work, either as an oral or poster presentation, at the conference.

Manuscripts must follow the standard single-spaced, double-column IEEE Transactions format. Templates are available from the IEEE Author Center article templates page.

Detailed Instructions for Paper Submission

IEEE TVLSI

IEEE Transactions on Very Large Scale Integration Systems.

Requirement: system-level innovations or implications across system, chip, and package levels, including large-scale SoCs, FPGA-based designs, 2.5D/3D chiplet-based systems-in-package, system-on-interposer, multi-die integrations, die-to-die interfaces, and HW/SW integration.

Important

When submitting a paper for ISICAS 2026, whether for TCAS-I, TCAS-II, TBioCAS, TVLSI, OJCAS, or TCAS-AI, please select the option “ISICAS 2026 Special Issue” in the journal submission system.

Plagiarism and Excessive Re-use of Earlier Material

Papers submitted for ISICAS 2026 will be checked for plagiarism and improper re-use of authors’ earlier material using IEEE CrossCheck.